| Type of Document |
Master's Thesis |
| Author |
Reed, David K
|
| Author's Email Address |
dreed@java.ee.pitt.edu |
| URN |
etd-06032004-223442 |
| Title |
A CO-SIMULATION ENVIRONMENT FOR MIXED SIGNAL, MULTI-DOMAIN SYSTEM LEVEL DESIGN EXPLORATION |
| Degree |
Master of Science in Electrical Engineering |
| Program |
Electrical Engineering |
| School |
School of Engineering |
| Advisory Committee |
| Advisor Name |
Title |
| Steven P. Levitan |
Committee Chair |
| Ray Hoare |
Committee Member |
| Tom Cain |
Committee Member |
|
| Keywords |
- hardware
- electrical
- simulator
- domain
- system
- digital
- analog
|
| Date of Defense |
2004-07-20 |
| Availability |
unrestricted |
Abstract
This thesis presents a system-level co-simulation environment for mixed domain design exploration. By employing shared memory IPC (Inter-Process Communication) and utilizing PDES (Parallel Discrete Event Simulation) techniques, we examine two methods of synchronization, lock-step and dynamic. We then compare the performance of these two methods on a series of test systems as well as real designs using the Chatoyant MOEMS (Micro-Electro Mechanical Systems) simulator and the mixed HDL (Hardware Description Language) simulator from Model Technology, ModelSim. The results collected are used to ascertain which method provides the best overall performance with the least overhead.
|
| Files |
| Filename |
Size |
Approximate Download Time
(Hours:Minutes:Seconds)
|
| 28.8 Modem |
56K Modem |
ISDN (64 Kb) |
ISDN (128 Kb) |
Higher-speed Access |
| |
DavidKReed_etdPitt2004_v2.pdf |
3.30 Mb |
00:15:15 |
00:07:51 |
00:06:52 |
00:03:26 |
00:00:17 |
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